Nano-fabrication includes the fabrication of very small structures that have features on the order of 100 nanometers or smaller. One application in which nano-fabrication has had a sizeable impact is in the processing of integrated circuits. The semiconductor processing industry continues to strive for larger production yields while increasing the circuits per unit area formed on a substrate; therefore nano-fabrication becomes increasingly important. Nano-fabrication provides greater process control while allowing continued reduction of the minimum feature dimensions of the structures formed. Other areas of development in which nano-fabrication has been employed include biotechnology, optical technology, mechanical systems, and the like.
An exemplary nano-fabrication technique in use today is commonly referred to as imprint lithography. Imprint lithography is useful in a variety of applications including, for example, fabricating layers of integrated devices such as CMOS logic, microprocessors, NAND Flash memory, NOR Flash memory, DRAM memory, or other memory devices such as MRAM, 3D cross-point memory, Re-RAM, Fe-RAM, STT-RAM, and the like. Imprint lithography is also useful in fabricating layers in a thin film head device for hard disks. Imprint lithography can also be used to fabricate patterned media for hard disk drives, optical devices such as polarizers for displays, photonic crystal structures, light trapping structures and filters for photovoltaic devices, nanostructures for battery electrodes, quantum dot structures for enhanced photonic and photovoltaic devices, biomedical devices, sensors, and in the fabrication of controlled nano-particles. Controlled nano-particles can be used to fabricate crystalline semiconducting materials, or as polymer-based drug carriers, among other uses. Exemplary imprint lithography processes are described in detail in numerous publications, such as U.S. Pat. No. 8,349,241, U.S. Patent Publication No. 2004/0065252, and U.S. Pat. No. 6,936,194, all of which are hereby incorporated by reference herein.
An imprint lithography technique disclosed in each of the aforementioned U.S. patent publication and patents includes formation of a relief pattern in a formable (polymerizable) layer and transferring a pattern corresponding to the relief pattern into an underlying substrate. The substrate may be coupled to a motion stage to obtain a desired positioning to facilitate the patterning process. The patterning process uses a template spaced apart from the substrate and a formable liquid applied between the template and the substrate. The formable liquid is solidified to form a rigid layer that has a pattern conforming to a shape of the surface of the template that contacts the formable liquid. After solidification, the template is separated from the rigid layer such that the template and the substrate are spaced apart. The substrate and the solidified layer are then subjected to additional processes to transfer a relief image into the substrate that corresponds to the pattern in the solidified layer.